New And Orignal Iso7221cdr Intergrated Circuit IC Chip

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.
The small capacitance and resulting time constant provide fast operation with signaling rates available from 0 Mbps (DC) to 150 Mbps (The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps). The A-option, B-option, and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise filter and the additional propagation delay.
The ISO7220x and ISO7221x family of devices require two supply voltages of 2.8 V (C-Grade), 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when supplied from a 2.8-V or 3.3-V supply and all outputs are 4-mA CMOS.
The ISO7220x and ISO7221x family of devices are characterized for operation over the ambient temperature range of –40°C to +125°C.