Special Price for Clock Integrated Circuit - Semicon Microcontroller Voltage regulator IC Chips TPS62420DRCR SON10 Electronic Components BOM list service – Yingnuode
Special Price for Clock Integrated Circuit - Semicon Microcontroller Voltage regulator IC Chips TPS62420DRCR SON10 Electronic Components BOM list service – Yingnuode Detail:
Product Attributes
TYPE | DESCRIPTION |
Category | Integrated Circuits (ICs) |
Mfr | Texas Instruments |
Series | Eco-Mode™ |
Package | Tape & Reel (TR)
Cut Tape (CT) Digi-Reel® |
SPQ | 2500T&R |
Product Status | Active |
Function | Step-Down |
Output Configuration | Positive |
Topology | Buck, Split Rail |
Output Type | Adjustable |
Number of Outputs | 1 |
Voltage – Input (Min) | 4.5V |
Voltage – Input (Max) | 60V |
Voltage – Output (Min/Fixed) | 0.8V |
Voltage – Output (Max) | 58.8V |
Current – Output | 5A |
Frequency – Switching | 500kHz |
Synchronous Rectifier | No |
Operating Temperature | -40°C ~ 150°C (TJ) |
Mounting Type | Surface Mount |
Package / Case | 8-PowerSOIC (0.154″, 3.90mm Width) |
Supplier Device Package | 8-SO PowerPad |
Base Product Number | TPS54560 |
1.IC naming, package general knowledge and naming rules:
Temperature range.
C=0°C to 60°C (commercial grade); I=-20°C to 85°C (industrial grade); E=-40°C to 85°C (extended industrial grade); A=-40°C to 82°C (aerospace grade); M=-55°C to 125°C (military grade)
Package type.
A-SSOP; B-CERQUAD; C-TO-200, TQFP; D-Ceramic copper top; E-QSOP; F-Ceramic SOP; H- SBGAJ-Ceramic DIP; K-TO-3; L-LCC, M-MQFP; N-Narrow DIP; N-DIP; Q PLCC; R – Narrow Ceramic DIP (300mil); S – TO-52, T – TO5, TO-99, TO-100; U – TSSOP, uMAX, SOT; W – Wide Small Form Factor (300mil) W-Wide small form factor (300 mil); X-SC-60 (3P, 5P, 6P); Y-Narrow copper top; Z-TO-92, MQUAD; D-Die; /PR-Reinforced plastic; /W-Wafer.
Number of pins:
a-8; b-10; c-12, 192; d-14; e-16; f-22, 256; g-4; h-4; i -4; H-4; I-28; J-2; K-5, 68; L-40; M-6, 48; N 18; O-42; P-20; Q-2, 100; R-3, 843; S-4, 80; T-6, 160; U-60 -6,160; U-60; V-8 (round); W-10 (round); X-36; Y-8 (round); Z-10 (round). (round).
Note: The first letter of the four letter suffix of the interface class is E, which means that the device has antistatic function.
2.Development of packaging technology
The earliest integrated circuits used ceramic flat packages, which continued to be used by the military for many years because of their reliability and small size. Commercial circuit packaging soon shifted to dual in-line packages, starting with ceramic and then plastic, and in the 1980s the pin count of VLSI circuits exceeded the application limits of DIP packages, eventually leading to the emergence of pin grid arrays and chip carriers.
The surface mount package emerged in the early 1980s and became popular in the later part of that decade. It uses a finer pin pitch and has a gull-wing or J-shaped pin shape. The Small-Outline Integrated Circuit (SOIC), for example, has 30-50% less area and is 70% less thick than the equivalent DIP. This package has gull-wing-shaped pins protruding from the two long sides and a pin pitch of 0.05″.
Small-Outline Integrated Circuit (SOIC) and PLCC packages. in the 1990s, although the PGA package was still often used for high-end microprocessors. the PQFP and thin small-outline package (TSOP) became the usual package for high pin count devices. Intel and AMD’s high-end microprocessors moved from PGA (Pine Grid Array) packages to Land Grid Array (LGA) packages.
Ball Grid Array packages began to appear in the 1970s, and in the 1990s the FCBGA package was developed with a higher pin count than other packages. In the FCBGA package, the die is flipped up and down and connected to the solder balls on the package by a PCB-like base layer rather than wires. In today’s market, the packaging is also now a separate part of the process, and the technology of the package can also affect the quality and yield of the product.
Product detail pictures:
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By Tyler Larson from Miami - 2017.01.28 18:53